Invention Grant
US07656224B2 Power efficient dynamically biased buffer for low drop out regulators
有权
用于低压降稳压器的功率有效的动态偏置缓冲器
- Patent Title: Power efficient dynamically biased buffer for low drop out regulators
- Patent Title (中): 用于低压降稳压器的功率有效的动态偏置缓冲器
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Application No.: US11081918Application Date: 2005-03-16
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Publication No.: US07656224B2Publication Date: 2010-02-02
- Inventor: Raul A. Perez , Mohammad Ali Odeh Al-Shyoukh
- Applicant: Raul A. Perez , Mohammad Ali Odeh Al-Shyoukh
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent John J. Patti; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: G05F1/10
- IPC: G05F1/10
Abstract:
The buffer circuit includes a first transistor MP1 having a first end coupled to an output node N2 and a control node coupled to an input node N1; a second transistor MN2 coupled to a second end of the first transistor MP1; a third transistor MN1 coupled to the second transistor MN2 such that a current in the third transistor MN1 is mirrored to the second transistor MN2; a first sense device MP3 coupled to the output node N2; a first current source I2 coupled to the output node N2; a second current source I1 coupled to the third transistor MN1; a second sense device MP2 coupled to the third transistor MN1; and a bipolar device Q1 coupled to the output node N2 and having a base coupled to the second end of the first transistor MP1.
Public/Granted literature
- US20060208770A1 Power efficient dynamically biased buffer for low drop out regulators Public/Granted day:2006-09-21
Information query
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