Invention Grant
US07655535B2 Method for fabricating semiconductor device having trench isolation layer
有权
制造具有沟槽隔离层的半导体器件的方法
- Patent Title: Method for fabricating semiconductor device having trench isolation layer
- Patent Title (中): 制造具有沟槽隔离层的半导体器件的方法
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Application No.: US11647929Application Date: 2006-12-29
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Publication No.: US07655535B2Publication Date: 2010-02-02
- Inventor: Hyo Seob Yoon , Woo Jin Kim , Ok Min Moon , Ji Yong Park
- Applicant: Hyo Seob Yoon , Woo Jin Kim , Ok Min Moon , Ji Yong Park
- Applicant Address: KR Icheon-si
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Icheon-si
- Agency: Marshall, Gerstein & Borun LLP
- Main IPC: H01L21/76
- IPC: H01L21/76

Abstract:
A method for fabricating a device isolation structure of a semiconductor device includes the steps of forming a pad oxide layer and a pad nitride layer over a semiconductor substrate including a cell region and a dummy region, etching a portion of the pad nitride layer, the pad oxide layer and the semiconductor substrate to form a trench, forming a sidewall oxide layer over the sidewalls of the trench; removing the sidewall oxide layer in the dummy region, forming a silicon nitride layer over the sidewalls of the sidewall oxide layer both in the cell region and in the dummy region, filling the trench with an insulating layer, polishing the insulating layer to expose the pad nitride layer, and removing the pad nitride layer.
Public/Granted literature
- US20080003769A1 Method for fabricating semiconductor device having trench isolation layer Public/Granted day:2008-01-03
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