Invention Grant
US07655511B2 Gate electrode stress control for finFET performance enhancement
有权
用于finFET性能提高的栅电极应力控制
- Patent Title: Gate electrode stress control for finFET performance enhancement
- Patent Title (中): 用于finFET性能提高的栅电极应力控制
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Application No.: US11163908Application Date: 2005-11-03
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Publication No.: US07655511B2Publication Date: 2010-02-02
- Inventor: Dureseti Chidambarrao
- Applicant: Dureseti Chidambarrao
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Agent Joseph P. Abate, Esq.
- Main IPC: H01L29/72
- IPC: H01L29/72
Abstract:
A finFET and its method for fabrication include a gate electrode formed over a channel region of a semiconductor fin. The semiconductor fin has a crystallographic orientation and an axially specific piezoresistance coefficient. The gate electrode is formed with an intrinsic stress determined to influence, and preferably optimize, charge carrier mobility within the channel region. To that end, the intrinsic stress preferably provides induced axial stresses within the gate electrode and semiconductor fin channel region that complement the axially specific piezoresistance coefficient.
Public/Granted literature
- US20070096206A1 GATE ELECTRODE STRESS CONTROL FOR FINFET PERFORMANCE ENHANCEMENT Public/Granted day:2007-05-03
Information query
IPC分类:
