Invention Grant
- Patent Title: Efficient transistor structure
- Patent Title (中): 高效晶体管结构
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Application No.: US11586471Application Date: 2006-10-25
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Publication No.: US07652338B2Publication Date: 2010-01-26
- Inventor: Sehat Sutardja
- Applicant: Sehat Sutardja
- Applicant Address: BB St. Michael
- Assignee: Marvell World Trade Ltd.
- Current Assignee: Marvell World Trade Ltd.
- Current Assignee Address: BB St. Michael
- Main IPC: H01L27/088
- IPC: H01L27/088

Abstract:
An integrated circuit comprises first and second drain regions have a generally rectangular shape. First, second and third source regions have a generally rectangular shape, wherein the first source region is arranged between first sides of the first and second drain regions and the second and third source regions are arranged adjacent to second sides of the first and second drain regions. Fourth and fifth source regions, wherein the fourth source region is arranged adjacent to third sides of the first and second drain regions and wherein the fifth source region is arranged adjacent to fourth sides of the first and second drain regions. A gate region is arranged between the first, second, third, fourth and fifth source regions and the first and second drain regions. First and second drain contacts that are arranged in the first and second drain regions.
Public/Granted literature
- US20070034904A1 Efficient transistor structure Public/Granted day:2007-02-15
Information query
IPC分类: