Invention Grant
- Patent Title: Handling of conditional instructions in a data processing apparatus
- Patent Title (中): 在数据处理设备中处理条件指令
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Application No.: US11632698Application Date: 2004-07-27
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Publication No.: US07647480B2Publication Date: 2010-01-12
- Inventor: Simon Andrew Ford , Andrew Christopher Rose
- Applicant: Simon Andrew Ford , Andrew Christopher Rose
- Applicant Address: GB Cambridge
- Assignee: ARM Limited
- Current Assignee: ARM Limited
- Current Assignee Address: GB Cambridge
- Agency: Nixon & Vanderhye P.C.
- International Application: PCT/GB2004/003258 WO 20040727
- International Announcement: WO2006/010872 WO 20060202
- Main IPC: G06F9/38
- IPC: G06F9/38

Abstract:
A data processing apparatus and method of handling conditional instructions in such a data processing apparatus are provided. The data processing apparatus has a pipelined processing unit for executing instructions including at least one conditional instruction from a set of conditional instructions, and a register file having a plurality of registers operable to store data values for access by the pipelined processing unit when executing the instructions. A register specified by an instruction may be either a source register holding a source data value for that instruction or a destination register into which is stored a result data value generated by execution of that instruction. The register file has a predetermined number of read ports via which data values can be read from registers of the register file. The pipelined processing unit is operable when executing the at least one conditional instruction to produce a result data value which, dependent on the existence of the condition specified by that conditional instruction, represents either the result of the computation specified by that conditional instruction or a current data value stored in the destination register for that conditional instruction. Further, each conditional instruction in the set is constrained to specify a register that is both a source register and a destination register for that conditional instruction, thereby reducing the minimum number of read ports required to support execution of that conditional instruction by the pipelined processing unit.
Public/Granted literature
- US20070208924A1 Handling of Conditional Instructions in a Data Processing Apparatus Public/Granted day:2007-09-06
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