Invention Grant
- Patent Title: High speed and high throughput digital communications processor with efficient cooperation between programmable processing components
- Patent Title (中): 高速和高吞吐量数字通信处理器，可编程处理组件之间的高效协作
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Application No.: US11510545Application Date: 2006-08-25
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Publication No.: US07647472B2Publication Date: 2010-01-12
- Inventor: Thomas B. Brightman , Andrew D. Funk , David J. Husak , Edward J. McLellan , Andrew T. Brown , John F. Brown , James A. Farrell , Donald A. Priore , Mark A. Sankey , Paul Schmitt
- Applicant: Thomas B. Brightman , Andrew D. Funk , David J. Husak , Edward J. McLellan , Andrew T. Brown , John F. Brown , James A. Farrell , Donald A. Priore , Mark A. Sankey , Paul Schmitt
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent Gordon E. Nelson
- Main IPC: G06F15/76
- IPC: G06F15/76
Abstract:
An integrated circuit (203) for use in processing streams of data generally and streams of packets in particular. The integrated circuit (203) includes a number of packet processors (307, 313, 303), a table look up engine (301), a queue management engine (305) and a buffer management engine (315). The packet processors (307, 313, 303) include a receive processor (421), a transmit processor (427) and a risc core processor (401), all of which are programmable. The receive processor (421) and the core processor (401) cooperate to receive and route packets being received and the core processor (401) and the transmit processor (427) cooperate to transmit packets. Routing is done by using information from the table look up engine (301) to determine a queue (215) in the queue management engine (305) which is to receive a descriptor (217) describing the received packet's payload.
Public/Granted literature
- US20060292292A1 Digital communications processor Public/Granted day:2006-12-28
Information query
