Invention Grant
US07646779B2 Hierarchical packet scheduler using hole-filling and multiple packet buffering
失效
分层数据包调度程序使用填充和多个数据包缓冲
- Patent Title: Hierarchical packet scheduler using hole-filling and multiple packet buffering
- Patent Title (中): 分层数据包调度程序使用填充和多个数据包缓冲
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Application No.: US11020942Application Date: 2004-12-23
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Publication No.: US07646779B2Publication Date: 2010-01-12
- Inventor: Alok Kumar , Michael Kounavis , Raj Yavatkar
- Applicant: Alok Kumar , Michael Kounavis , Raj Yavatkar
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: H04L12/56
- IPC: H04L12/56

Abstract:
A hierarchical packet scheduler using hole-filling and multiple packet buffering. Packet references are enqueued into a hierarchical packet scheduler, wherein the hierarchical packet scheduler includes one or more levels, each level including one or more schedulers being served by one or more threads, wherein the number of threads serving a particular level is not dependent on the number of schedulers on the particular level. Packet references are dequeued from the hierarchical packet scheduler at a root level scheduler of the one or more schedulers.
Public/Granted literature
- US20060140201A1 Hierarchical packet scheduler using hole-filling and multiple packet buffering Public/Granted day:2006-06-29
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