Invention Grant
- Patent Title: Incremental redundancy using high-order modulation and coding schemes
- Patent Title (中): 使用高阶调制和编码方案的增量冗余
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Application No.: US11425373Application Date: 2006-06-20
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Publication No.: US07646701B2Publication Date: 2010-01-12
- Inventor: Paul Spencer
- Applicant: Paul Spencer
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwegman, Lundberg & Woessner, P.A.
- Main IPC: H04L1/00
- IPC: H04L1/00

Abstract:
Apparatus and systems comprise a forward error correction (FEC) encoder to encode a data block to produce an encoded data block in a radio link control media access control (RLC-MAC) module. The EFC encoder may be coupled to a punctured subset selector to select a punctured subset of the encoded data block for transmission across a communication link. The punctured subset selector may be coupled to a modulator to modulate the punctured subset of the encoded data block using a selectable modulation type selected by a modulation selector coupled to the modulator. Hybrid automatic repeat request (HARQ) logic may be coupled to the modulation selector to receive at least one of an acknowledgement (ACK) or a no-acknowledgement (NACK) that a previously-transmitted punctured subset of the encoded data block was successfully decoded at a receiving end of the communication link. Additional apparatus, systems, and methods are disclosed.
Public/Granted literature
- US20080002565A1 INCREMENTAL REDUNDANCY USING HIGH-ORDER MODULATION AND CODING SCHEMES Public/Granted day:2008-01-03
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