Invention Grant
US07646660B2 Semiconductor memory, system, and operating method of semiconductor memory
失效
半导体存储器的半导体存储器,系统和操作方法
- Patent Title: Semiconductor memory, system, and operating method of semiconductor memory
- Patent Title (中): 半导体存储器的半导体存储器,系统和操作方法
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Application No.: US12035248Application Date: 2008-02-21
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Publication No.: US07646660B2Publication Date: 2010-01-12
- Inventor: Hiroyoshi Tomita
- Applicant: Hiroyoshi Tomita
- Applicant Address: JP Tokyo
- Assignee: Fujitsu Microelectronics Limited
- Current Assignee: Fujitsu Microelectronics Limited
- Current Assignee Address: JP Tokyo
- Agency: Arent Fox LLP
- Priority: JP2007-083484 20070328
- Main IPC: G11C7/00
- IPC: G11C7/00

Abstract:
Partial refresh information indicating enabling/disabling of a refresh operation is set according to an external input and is output as a partial set signal. A refresh request signal is output periodically corresponding to a memory block for which a refresh operation is enabled. The partial set signal is masked so as to enable a refresh operation for all of the memory blocks during a period in which the partial refresh information is changed by the external input. Thus, it is possible to prevent disabling of a refresh operation in response to a refresh request even when timing of changing the partial refresh information and timing of occurrence of the refresh request signal overlap. Consequently, the refresh operation can be executed securely, and malfunctioning of the semiconductor memory can be prevented.
Public/Granted literature
- US20080239854A1 SEMICONDUCTOR MEMORY, SYSTEM, AND OPERATING METHOD OF SEMICONDUCTOR MEMORY Public/Granted day:2008-10-02
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