Invention Grant
US07646234B2 Integrated circuit and method of generating a bias signal for a data signal receiver
失效
用于产生数据信号接收机的偏置信号的集成电路和方法
- Patent Title: Integrated circuit and method of generating a bias signal for a data signal receiver
- Patent Title (中): 用于产生数据信号接收机的偏置信号的集成电路和方法
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Application No.: US11858240Application Date: 2007-09-20
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Publication No.: US07646234B2Publication Date: 2010-01-12
- Inventor: Hari Bilash Dubey
- Applicant: Hari Bilash Dubey
- Applicant Address: DE Munich
- Assignee: Qimonda AG
- Current Assignee: Qimonda AG
- Current Assignee Address: DE Munich
- Agency: Dicke, Billig & Czaja, PLLC
- Main IPC: G05F1/02
- IPC: G05F1/02 ; G05F3/16

Abstract:
An integrated circuit and method of generating a bias signal for a data signal receiver is disclosed. One embodiment provides a replica circuit configured to generate a feedback signal, wherein the replica circuit is a replica of at least a part of a data signal receiver, and wherein the feedback signal depends on a reference signal of the data signal receiver. A compensation circuit is configured to compensate an influence of the reference signal on the feedback signal. An amplifier circuit is configured to generate a bias signal based on the feedback signal, the bias signal being provided to the data signal receiver.
Public/Granted literature
- US20090080570A1 INTEGRATED CIRCUIT AND METHOD OF GENERATING A BIAS SIGNAL FOR A DATA SIGNAL RECEIVER Public/Granted day:2009-03-26
Information query
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