Invention Grant
- Patent Title: Complementary metal-oxide-semiconductor transistor including multiple gate conductive layers and method of manufacturing the same
- Patent Title (中): 包括多个栅极导电层的互补金属氧化物半导体晶体管及其制造方法
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Application No.: US11891337Application Date: 2007-08-10
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Publication No.: US07646067B2Publication Date: 2010-01-12
- Inventor: Gab-Jin Nam , Myoung-Bum Lee
- Applicant: Gab-Jin Nam , Myoung-Bum Lee
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Mills & Onello, LLP
- Priority: KR10-2006-0078730 20060821
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L29/94 ; H01L31/062 ; H01L31/113 ; H01L31/119 ; H01L27/01 ; H01L27/12 ; H01L23/62

Abstract:
A CMOS transistor and a method of manufacturing the CMOS transistor are disclosed. An NMOS transistor is formed on a first region of a semiconductor substrate. A PMOS transistor is formed on a second region of a semiconductor substrate. The NMOS transistor includes a first gate conductive layer. The PMOS transistor includes a second gate conductive layer. The first gate conductive layer includes a metal having a nitrogen concentration increasing in a direction from a lower portion toward an upper portion. In addition, the metal has a work function of about 4.0 eV to about 4.3 eV. The third gate conductive layer includes a metal having a nitrogen concentration increasing in a direction from a lower portion toward an upper portion. In addition, the metal has a work function of about 4.7 eV to about 5.0 eV.
Public/Granted literature
- US20080042213A1 Complementary metal-oxide-semiconductor transistor and method of manufacturing the same Public/Granted day:2008-02-21
Information query
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