Invention Grant
- Patent Title: Transistors having buried p-type layers coupled to the gate
- Patent Title (中): 晶体管具有连接到栅极的p型层
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Application No.: US11536143Application Date: 2006-09-28
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Publication No.: US07646043B2Publication Date: 2010-01-12
- Inventor: Saptharishi Sriram , Matt Willis
- Applicant: Saptharishi Sriram , Matt Willis
- Applicant Address: US NC Durham
- Assignee: Cree, Inc.
- Current Assignee: Cree, Inc.
- Current Assignee Address: US NC Durham
- Agency: Myers Bigel Sibley & Sajovec
- Main IPC: H01L29/10
- IPC: H01L29/10

Abstract:
A unit cell of a metal-semiconductor field-effect transistor (MESFET) is provided. The MESFET has a source, a drain and a gate. The gate is between the source and the drain and on an n-type conductivity channel layer. A p-type conductivity region is provided beneath the gate between the source and the drain. The p-type conductivity region is spaced apart from the n-type conductivity channel layer and electrically coupled to the gate. Related methods are also provided herein.
Public/Granted literature
- US20080079036A1 TRANSISTORS HAVING BURIED P-TYPE LAYERS COUPLED TO THE GATE AND METHODS OF FABRICATING THE SAME Public/Granted day:2008-04-03
Information query
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