Invention Grant
- Patent Title: Integrated circuit package system with leadframe substrate
- Patent Title (中): 具有引线框架基板的集成电路封装系统
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Application No.: US11163561Application Date: 2005-10-23
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Publication No.: US07645640B2Publication Date: 2010-01-12
- Inventor: Cheonhee Lee , Youngnam Choi
- Applicant: Cheonhee Lee , Youngnam Choi
- Applicant Address: SG Singapore
- Assignee: Stats Chippac Ltd.
- Current Assignee: Stats Chippac Ltd.
- Current Assignee Address: SG Singapore
- Agent Mikio Ishimaru
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A system for manufacturing an integrated circuit package system is provided. A dual-type leadframe having first and second rows of leads is formed. A first row of bumps is formed on an integrated circuit chip. Solder paste is placed on the first row of leads, and the first row of bumps is pressed into the solder paste on the first row of leads. The solder paste is reflow soldered to form solder and connect the integrated circuit chip to the first row of leads, and the integrated circuit chip, the first row of bumps, the solder, and the leadframe are encapsulated.
Public/Granted literature
- US20060102989A1 INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEADFRAME SUBSTRATE Public/Granted day:2006-05-18
Information query
IPC分类: