Invention Grant
US07644384B2 Method and system for distributing clock signals on non-Manhattan semiconductor integrated circuits
失效
在非曼哈顿半导体集成电路上分配时钟信号的方法和系统
- Patent Title: Method and system for distributing clock signals on non-Manhattan semiconductor integrated circuits
- Patent Title (中): 在非曼哈顿半导体集成电路上分配时钟信号的方法和系统
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Application No.: US11464478Application Date: 2006-08-14
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Publication No.: US07644384B2Publication Date: 2010-01-05
- Inventor: Steven Teig , Raghu Chalasani , Akira Fujimura
- Applicant: Steven Teig , Raghu Chalasani , Akira Fujimura
- Applicant Address: US CA San Jose
- Assignee: Cadence Design Systems, Inc.
- Current Assignee: Cadence Design Systems, Inc.
- Current Assignee Address: US CA San Jose
- Agency: Adeli & Tollen LLP
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
The present invention introduces methods, systems, and architectures for routing clock signals in an integrated circuit layout. The introduced clock signal clock signal structures are rendered with non Manhattan routing. In a first embodiment, the traditional recursive H clock signal structure is rendered after transforming the coordinates system such that a rotated recursive H clock signal structure is rendered. In another embodiment, a recursive Y structure is used to create a clock signal structure. The recursive Y structure may also be implemented in a rotated alignment. For clock signal redundancy, non Manhattan wiring may be used to create a clock signal mesh network.
Public/Granted literature
- US20060277514A1 Method and System for Distributing Clock Signals on Non-Manhattan Semiconductor Integrated Circuits Public/Granted day:2006-12-07
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