Invention Grant
US07644234B2 Information processing apparatus with a cache memory and information processing method
有权
具有高速缓冲存储器和信息处理方法的信息处理装置
- Patent Title: Information processing apparatus with a cache memory and information processing method
- Patent Title (中): 具有高速缓冲存储器和信息处理方法的信息处理装置
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Application No.: US11141700Application Date: 2005-05-31
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Publication No.: US07644234B2Publication Date: 2010-01-05
- Inventor: Nobuo Sasaki , Takeshi Yamazaki , Atsushi Kunimatsu , Hideki Yasukawa
- Applicant: Nobuo Sasaki , Takeshi Yamazaki , Atsushi Kunimatsu , Hideki Yasukawa
- Applicant Address: JP Tokyo JP Tokyo
- Assignee: Sony Computer Entertainment Inc.,Kabushiki Kaisha Toshiba
- Current Assignee: Sony Computer Entertainment Inc.,Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo JP Tokyo
- Agency: Katten Muchin Rosenman LLP
- Priority: JP2004-162636 20040531
- Main IPC: G06F12/08
- IPC: G06F12/08 ; G06F13/00

Abstract:
A secondary texture cache is used commonly by a plurality of texture units, and stores part of texture data in a main memory. A cache controlling CPU controls a refill operation from the main memory to the secondary texture cache in accordance with cache misses of the plurality of texture units, so as to suppress occurrence of thrashing in the secondary texture cache. The cache controlling CPU suppresses occurrence of the refill operation when the plurality of operating units access an identical memory address with a predetermined time difference.
Public/Granted literature
- US20050275658A1 Information processing apparatus with a cache memory and information processing method Public/Granted day:2005-12-15
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