Invention Grant
- Patent Title: Frame alteration logic for network processors
- Patent Title (中): 网络处理器的帧更改逻辑
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Application No.: US12327761Application Date: 2008-12-03
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Publication No.: US07643511B2Publication Date: 2010-01-05
- Inventor: Peter I. A. Barri , Claude Basso , Jean L. Calvignac , Brahmanand K. Gorti , Joseph F. Logan , Natarajan Valdhyanathan , Johan G. A. Verkinderen
- Applicant: Peter I. A. Barri , Claude Basso , Jean L. Calvignac , Brahmanand K. Gorti , Joseph F. Logan , Natarajan Valdhyanathan , Johan G. A. Verkinderen
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Yee & Associates, P.C.
- Agent Mark E. McBurney
- Main IPC: H04J3/22
- IPC: H04J3/22

Abstract:
Packet switching node in a communication system includes apparatus for receiving incoming information packets or frames which contain header portions with formatting control blocks. Information in the frame's header contains frame alteration commands for modifying the information in the frame. The modifications include adding new information, deleting information, and overlaying information. Decoders and control devices in an alteration engine interpret the commands and apply the modifications to the frame data. Common and standard data patterns are stored for insertion or overlaying to conserve data packet space.
Public/Granted literature
- US20090080461A1 FRAME ALTERATION LOGIC FOR NETWORK PROCESSORS Public/Granted day:2009-03-26
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