Invention Grant
- Patent Title: Receiving circuit and time piece
- Patent Title (中): 接收电路和时间片
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Application No.: US11880636Application Date: 2007-07-23
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Publication No.: US07643380B2Publication Date: 2010-01-05
- Inventor: Kaoru Someya
- Applicant: Kaoru Someya
- Applicant Address: JP Tokyo
- Assignee: Casio Computer Co., Ltd.
- Current Assignee: Casio Computer Co., Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Frishauf, Holtz, Goodman & Chick, P.C.
- Priority: JP2006-202944 20060726
- Main IPC: G04C11/02
- IPC: G04C11/02 ; H04B17/02

Abstract:
A receiving circuit is provided with an amplifier circuit for amplifying the electric signal received by an antenna circuit, a frequency converter/detector circuit for converting a frequency of the electric signal amplified by the amplifier circuit to acquire an intermediate frequency signal, and for detecting the intermediate frequency signal to acquire a demodulated signal, and a filter circuit for removing an intermediate frequency component from the demodulated signal acquired by the frequency converter/detector circuit. Further, the frequency converter/detector circuit is provided with a local oscillation circuit for generating an oscillation signal, plural mixer circuits each for mixing the electric signal amplified by the amplifier circuit with the oscillation signal generated by the local oscillation circuit, whereby plural intermediate frequency signals are generated, which are shifted in phase from each other, plural detecting circuits for detecting the plural intermediate frequency signals generated by the plural mixer circuits, respectively to output plural demodulated signals, and an adder circuit for combining the plural demodulated signals output respectively from the plural detecting circuits.
Public/Granted literature
- US20080025155A1 Receiving circuit and time piece Public/Granted day:2008-01-31
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