Invention Grant
- Patent Title: Reference voltage generating circuit and semiconductor integrated circuit device
- Patent Title (中): 参考电压发生电路和半导体集成电路器件
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Application No.: US12018375Application Date: 2008-01-23
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Publication No.: US07642843B2Publication Date: 2010-01-05
- Inventor: Yoshiro Riho
- Applicant: Yoshiro Riho
- Applicant Address: JP Tokyo
- Assignee: Elpida Memory Inc.
- Current Assignee: Elpida Memory Inc.
- Current Assignee Address: JP Tokyo
- Agency: Young & Thompson
- Priority: JP2007-013178 20070123
- Main IPC: G05F1/10
- IPC: G05F1/10

Abstract:
A reference voltage generating circuit comprises: a monitor circuit, including a low threshold voltage PMOS transistor, a low threshold voltage NMOS transistor, and a resistor having a predetermined resistance which are connected in series, for generating a reference voltage at one end; and an additional circuit for supplying a monitor current to the monitor circuit and for controlling the other end of the monitor circuit to be at a constant voltage, wherein a voltage value of the reference voltage is corrected within a range corresponding to a process fluctuation from a predetermined center value, based on the monitor current changing in response to the process fluctuation.
Public/Granted literature
- US20080211572A1 REFERENCE VOLTAGE GENERATING CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE Public/Granted day:2008-09-04
Information query
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