Invention Grant
- Patent Title: Method for synchronizing a clock signal with a reference signal, and phase locked loop
- Patent Title (中): 时钟信号与参考信号同步的方法,以及锁相环
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Application No.: US11675191Application Date: 2007-02-15
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Publication No.: US07642821B2Publication Date: 2010-01-05
- Inventor: Guenter Krasser , Thomas Duda
- Applicant: Guenter Krasser , Thomas Duda
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Dicke, Billig & Czaja, PLLC
- Priority: DE102006007094 20060215
- Main IPC: H03L7/06
- IPC: H03L7/06

Abstract:
A method for synchronizing a clock signal with a reference signal is disclosed. One embodiment has a first synchronization part which has a bit pattern having a particular clock period, a pause whose length is a multiple of this clock period plus a fraction of the clock period, and a second synchronization part having the particular clock period. The method includes generating a phase difference signal which is proportional to a phase difference between the clock signal and the reference signal, filtering the phase difference signal and providing a filtered phase difference signal, driving a digital oscillator in such a manner that the frequency of the clock signal is changed on the basis of the filtered phase difference signal, the phase of the clock signal within a clock period being corrected by a value corresponding to the fraction of the clock period at an end of the pause in the reference signal.
Public/Granted literature
- US20070194819A1 METHOD FOR SYNCHRONIZING A CLOCK SIGNAL WITH A REFERENCE SIGNAL, AND PHASE LOCKED LOOP Public/Granted day:2007-08-23
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