Invention Grant
US07642648B2 Semiconductor device having a reductant layer and manufacturing method thereof 失效
具有还原层的半导体装置及其制造方法

Semiconductor device having a reductant layer and manufacturing method thereof
Abstract:
A semiconductor device includes an inter-metal dielectric (IMD) formed on a substrate and having at least one via hole, a via hole formed by filling the via hole with a first metal, a reductant layer formed on the via plug and the inter-metal dielectric to a predetermined thickness, and a metal line layer formed by depositing a second metal on the reductant layer.
Information query
Patent Agency Ranking
0/0