Invention Grant
US07642639B2 COB type IC package to enhanced bondibility of bumps embedded in substrate and method for fabricating the same
有权
COB型IC封装,以增强嵌入在衬底中的凸起的焊接性及其制造方法
- Patent Title: COB type IC package to enhanced bondibility of bumps embedded in substrate and method for fabricating the same
- Patent Title (中): COB型IC封装,以增强嵌入在衬底中的凸起的焊接性及其制造方法
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Application No.: US11583951Application Date: 2006-10-20
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Publication No.: US07642639B2Publication Date: 2010-01-05
- Inventor: Hsiang-Ming Huang , An-Hong Liu , Yeong-Jyh Lin , Yi-Chang Lee
- Applicant: Hsiang-Ming Huang , An-Hong Liu , Yeong-Jyh Lin , Yi-Chang Lee
- Applicant Address: TW Hsinchu BM Hamilton
- Assignee: ChipMos Technologies Inc.,ChipMos Technologies (Bermuda) Ltd.
- Current Assignee: ChipMos Technologies Inc.,ChipMos Technologies (Bermuda) Ltd.
- Current Assignee Address: TW Hsinchu BM Hamilton
- Agency: WPAT, P.C.
- Agent Anthony King
- Priority: CN95116910 20060512
- Main IPC: H01L23/04
- IPC: H01L23/04 ; H01L23/48

Abstract:
An IC package to enhance the bondibility of embedded bumps, primarily includes a substrate having a plurality of bump-accommodating holes, a bumped chip, an encapsulant, and a plurality of external terminals. The substrate further has a plurality of inner pads at one ends of the bump-accommodating holes respectively. The inner pads may be meshed or a soldering layer is disposed thereon for improving bump connection. The chip is attached to the substrate with the bumps aligned and embedded in the corresponding bump-accommodating holes. The encapsulant is at least formed on a lower surface of the substrate to encapsulate the meshes or the soldering layer. By the suspended meshes or/and the soldering layer, the bumps can be easily bonded at lower temperatures to simplify the manufacturing process with shorter electrical conductive paths and thinner package profiles without wire sweeping.
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