Invention Grant
US07642498B2 Capacitor multipler circuits and the applications thereof to attenuate row-wise temporal noise in image sensors
有权
电容乘法器电路及其应用,用于衰减图像传感器中的行方向时间噪声
- Patent Title: Capacitor multipler circuits and the applications thereof to attenuate row-wise temporal noise in image sensors
- Patent Title (中): 电容乘法器电路及其应用,用于衰减图像传感器中的行方向时间噪声
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Application No.: US11696608Application Date: 2007-04-04
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Publication No.: US07642498B2Publication Date: 2010-01-05
- Inventor: Ali E. Zadeh
- Applicant: Ali E. Zadeh
- Applicant Address: KY George Town
- Assignee: Aptina Imaging Corporation
- Current Assignee: Aptina Imaging Corporation
- Current Assignee Address: KY George Town
- Agency: Treyz Law Group
- Main IPC: H01L27/00
- IPC: H01L27/00 ; H01J40/14

Abstract:
The various embodiments disclose capacitor multiplier circuits that may be integrated into imaging devices, such as for semiconductor Complimentary Metal Oxide Semiconductor (CMOS) image sensors, to create an effective capacitance in response to a low frequency, such as row-wise temporal noise, that may be generated along a row of image sensor pixels. The created effective capacitance from any one of the capacitor multiplier circuits along with a small signal resistance created by a trans-conductance of a current biasing transistor form a low pass filter that will attenuate the low frequency noise.
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