Invention Grant
- Patent Title: Multilayer wiring board and fabricating method of the same
- Patent Title (中): 多层布线板及其制造方法相同
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Application No.: US11458178Application Date: 2006-07-18
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Publication No.: US07642468B2Publication Date: 2010-01-05
- Inventor: Masakazu Nakada , Minoru Ogawa
- Applicant: Masakazu Nakada , Minoru Ogawa
- Applicant Address: JP Tokyo
- Assignee: Sony Corporation
- Current Assignee: Sony Corporation
- Current Assignee Address: JP Tokyo
- Agency: Sonnenschein Nath & Rosenthal LLP
- Priority: JPP2004-325259 20041109; JPP2005-212570 20050722
- Main IPC: H05K1/11
- IPC: H05K1/11 ; H01R12/04

Abstract:
To improve reliability of interlayer connection of a multilayer wiring board. Plural metal conductor pattern layers are formed on a base material made of thermoplastic resin. Then, high melting metal containing copper, low melting metal containing tin, and binder resin are packed into a via hole. Subsequently, predetermined heat and pressure are applied. Then, while half-melted metal mixture droplets of the low and high melting metals and melted binder resin are phase separated from each other, the surfaces of the conductor patterns that face the openings of the via and the low melting metal are alloyed with each other to form an alloy layer as well as the high and low meting metals are alloyed with each other to form a columnar-shaped interlayer connection part. As a result, an intermediate layer is formed between the outer surface of the columnar-shaped interlayer connection part and inner surface of the via hole.
Public/Granted literature
- US20060274510A1 MULTILAYER WIRING BOARD AND FABRICATING METHOD OF THE SAME Public/Granted day:2006-12-07
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