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US07642189B2 Synergy effect of alloying materials in interconnect structures 有权
合金材料在互连结构中的协同作用

Synergy effect of alloying materials in interconnect structures
Abstract:
A method of forming an integrated circuit structure, the method includes providing a semiconductor substrate; forming a dielectric layer over the semiconductor substrate; forming an opening in the dielectric layer; forming a seed layer in the opening; forming a copper line on the seed layer, wherein at least one of the seed layer and the copper line includes an alloying material; and forming an etch stop layer on the copper line.
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