Invention Grant
- Patent Title: ESD protection for passive integrated devices
- Patent Title (中): 无源集成器件的ESD保护
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Application No.: US11972475Application Date: 2008-01-10
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Publication No.: US07642182B2Publication Date: 2010-01-05
- Inventor: Agni Mitra , Darrell G. Hill , Karthik Rajagopalan , Adolfo C. Reyes
- Applicant: Agni Mitra , Darrell G. Hill , Karthik Rajagopalan , Adolfo C. Reyes
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agency: Ingrassia, Fisher & Lorenz, P.C.
- Main IPC: H01L21/44
- IPC: H01L21/44

Abstract:
Methods and apparatus are provided for ESD protection of integrated passive devices (IPDs). The apparatus comprises one or more IPDs having terminals or other elements potentially exposed to ESD transients coupled by charge leakage resistances having resistance values much larger than the ordinary impedance of the IPDs at the operating frequency of interest. When the IPD is built on a semi-insulating substrate, various elements of the IPD are coupled to the substrate by spaced-apart connections so that the substrate itself provides the high value resistances coupling the elements, but this is not essential. When applied to an IPD RF coupler, the ESD tolerance increased by over 70%. The invented arrangement can also be applied to active devices and integrated circuits and to IPDs with conductive or insulating substrates.
Public/Granted literature
- US20080108217A1 ESD PROTECTION FOR PASSIVE INTEGRATED DEVICES Public/Granted day:2008-05-08
Information query
IPC分类: