Invention Grant
- Patent Title: Method for manufacturing a flash memory device with cavities in upper portions of conductors
- Patent Title (中): 用于制造在导体上部具有空腔的闪存器件的方法
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Application No.: US12016109Application Date: 2008-01-17
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Publication No.: US07642142B2Publication Date: 2010-01-05
- Inventor: Wei-Ming Liao , Ming-Cheng Chang
- Applicant: Wei-Ming Liao , Ming-Cheng Chang
- Applicant Address: TW Taoyuan
- Assignee: Nanya Technology Corporation
- Current Assignee: Nanya Technology Corporation
- Current Assignee Address: TW Taoyuan
- Agency: Quintero Law Office
- Priority: TW96134687A 20070917
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/84

Abstract:
A method for forming a semiconductor device includes providing a substrate and forming conductor patterns and openings on the substrate. Next the openings are filled with a mask layer and upper portions of the conductor patterns are etched to form cavities. Following, a portion of the mask layer is removed to form a trench between two neighboring conductor patterns, wherein the trench exposes the substrate and the sidewalls of the two neighboring conductor patterns. Next, an insulating layer on the cavities and the trench is conformably formed, a second conductive layer is formed on the insulating layer and the trench is filled with the second conductive layer.
Public/Granted literature
- US20090075467A1 METHOD FOR MANUFACTURING A FLASH MEMORY DEVICE Public/Granted day:2009-03-19
Information query
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