Invention Grant
- Patent Title: Method of manufacturing a semiconductor package having conductive pillars
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Application No.: US17805594Application Date: 2022-06-06
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Publication No.: US12159822B2Publication Date: 2024-12-03
- Inventor: Jiun Yi Wu , Chen-Hua Yu , Chung-Shi Liu
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L21/56 ; H01L23/00 ; H01L23/14 ; H01L23/29 ; H01L23/31

Abstract:
A semiconductor package includes an interconnect structure including a redistribution structure, an insulating layer over the redistribution structure, and conductive pillars on the insulating layer, wherein the conductive pillars are connected to the redistribution structure, wherein the interconnect structure is free of active devices, a routing substrate including a routing layer over a core substrate, wherein the interconnect structure is bonded to the routing substrate by solder joints, wherein each of the solder joints bonds a conductive pillar of the conductive pillars to the routing layer, an underfill surrounding the conductive pillars and the solder joints, and a semiconductor device including a semiconductor die connected to a routing structure, wherein the routing structure is bonded to an opposite side of the interconnect structure as the routing substrate.
Public/Granted literature
- US20220302009A1 SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURE Public/Granted day:2022-09-22
Information query
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