Multi-pass decoder-side motion vector refinement
Abstract:
An example device includes memory configured to store video data and one or more processors coupled to the memory. The one or more processors are configured to apply a multi-pass DMVR to a motion vector for a block of the video data to determine at least one refined motion vector and decode the block based on the at least one refined motion vector. The multi-pass DMVR includes a block-based first pass, a sub-block-based second pass, and a sub-block-based third pass.
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