- Patent Title: Semiconductor package having smart power stage and E-fuse solution
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Application No.: US18242460Application Date: 2023-09-05
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Publication No.: US12113016B2Publication Date: 2024-10-08
- Inventor: Prabal Upadhyaya
- Applicant: ALPHA AND OMEGA SEMICONDUCTOR INTERNATIONAL LP
- Applicant Address: CA Toronto
- Assignee: ALPHA AND OMEGA SEMICONDUCTOR INTERNATIONAL LP
- Current Assignee: ALPHA AND OMEGA SEMICONDUCTOR INTERNATIONAL LP
- Current Assignee Address: CA Toronto
- Agent Chen-Chi Lin
- The original application number of the division: US17135026 2020.12.28
- Main IPC: H01L23/31
- IPC: H01L23/31 ; H01L23/495 ; H01L23/50 ; H01L23/525 ; H01L23/62 ; H01L27/088 ; H02M3/158

Abstract:
A semiconductor package comprises a lead frame, a low side metal-oxide-semiconductor field-effect transistor (MOSFET), an E-fuse MOSFET, a high side MOSFET, a metal connection, a gate driver, an E-fuse IC, and a molding encapsulation. A buck converter comprises a smart power stage (SPS) network and an E-fuse solution network. The SPS network comprises a high side switch, a low side switch, and a gate driver. A drain of the low side switch is coupled to a source of the high side switch via a switch node. The gate driver is coupled to a gate of the high side switch and a gate of the low side switch. The E-fuse solution network comprises a sense resistor, an E-fuse switch, an E-fuse integrated circuit (IC), and an SD circuit.
Public/Granted literature
- US20230420362A1 SEMICONDUCTOR PACKAGE HAVING SMART POWER STAGE AND E-FUSE SOLUTION Public/Granted day:2023-12-28
Information query
IPC分类: