Invention Grant
- Patent Title: Electronic package and manufacturing method thereof
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Application No.: US17674457Application Date: 2022-02-17
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Publication No.: US12113004B2Publication Date: 2024-10-08
- Inventor: Chung-Yu Ke , Po-Kai Huang , Liang-Pin Chen
- Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.
- Applicant Address: TW Taichung
- Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
- Current Assignee: SILICONWARE PRECISION INDUSTRIES CO., LTD.
- Current Assignee Address: TW Taichung
- Agency: Dority & Manning, P.A.
- Priority: TW 0147934 2021.12.21
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L21/48 ; H01L23/00 ; H01L25/10

Abstract:
An electronic package is provided and includes stacking a first packaging module having a circuit structure, an electronic element, a plurality of first conductive elements and a first packaging layer with a second packaging module having a routing structure, a plurality of second conductive elements and a second packaging layer, so that the second packaging layer is formed on the first packaging layer in a manner that the routing structure is overlapped on the circuit structure, where each of the second conductive elements is correspondingly bonded with each of the first conductive elements. Accordingly, the circuit structure and the routing structure are manufactured separately at the same time, so as to shorten the process time and control the stress distribution on the circuit structure and the routing structure separately.
Public/Granted literature
- US20230197591A1 ELECTRONIC PACKAGE AND MANUFACTURING METHOD THEREOF Public/Granted day:2023-06-22
Information query
IPC分类: