A device may include an electronic display to display image frames. The display may include illuminators that generate light and mirrors that selectively direct the light to pixel locations based bitplanes that set the arrangement of the mirrors. Additionally, the device may include duty cycle balancing circuitry that generates and provides duty cycle balancing signals to the electronic display. In response to the duty cycle balancing signals, the electronic display is implements balancing on bitplanes during at least a first portion of off periods during the image frames and implements balancing off bitplanes during at least a second portion of the off periods such that, in the aggregate, a ratio of respective on times of the mirrors to respective off times of the mirrors is balanced across the image frames during the off periods.