Invention Grant
- Patent Title: Non-interleaving N-well and P-well pickup region design for IC devices
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Application No.: US17871603Application Date: 2022-07-22
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Publication No.: US12035518B2Publication Date: 2024-07-09
- Inventor: Ka-Hing Fung
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: Haynes and Boone, LLP
- The original application number of the division: US17011440 2020.09.03
- Main IPC: H01L27/11
- IPC: H01L27/11 ; G06F30/392 ; G11C11/412 ; H01L27/092 ; H01L29/78 ; H10B10/00

Abstract:
A semiconductor device includes a first region, a second region, a third region, and a fourth region. The first region includes a first portion of an N-well and a plurality of P-type transistors formed over the first portion of the N-well. The first region extends in a first direction. The second region includes a first portion of a P-well and a plurality of N-type transistors formed over the first portion of the P-well. The second region extends in the first direction. The third region includes a second portion of the P-well. The fourth region includes a second portion of the N-well. The first region and the second region are disposed between the third region and the fourth region.
Public/Granted literature
- US20220375943A1 Non-Interleaving N-Well And P-Well Pickup Region Design For Ic Devices Public/Granted day:2022-11-24
Information query
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