Invention Grant
- Patent Title: Hardware countermeasures against DFA attacks on AES operations
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Application No.: US17844817Application Date: 2022-06-21
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Publication No.: US12034831B2Publication Date: 2024-07-09
- Inventor: Steven Cooreman
- Applicant: Silicon Laboratories Inc.
- Applicant Address: US TX Austin
- Assignee: Silicon Laboratories Inc.
- Current Assignee: Silicon Laboratories Inc.
- Current Assignee Address: US TX Austin
- Agency: NIELDS, LEMACK & FRAME, LLC
- Main IPC: H04L9/00
- IPC: H04L9/00 ; H04L9/06

Abstract:
A system and method of performing an AES encryption, while also determining whether a potentially successful DFA attack is underway is disclosed. When interim results are not visible, the DFA attack that is most likely to be succeed is initiated by introducing the fault between the MixColumns operation in the second to last round and the MixColumns operation in the next to last round. To detect this, the present system and method performs the next to last round and then repeats this next to last round. The results of the original round and repeated round are compared to identify a possible DFA attack. Importantly, the same hardware is used for the original round and the repeated round. In this way, the amount of additional hardware needed to detect a possibly successful DFA attack is minimized. Further, the impact on execution time may be 10% or less.
Public/Granted literature
- US20230412356A1 Hardware Countermeasures Against DFA Attacks on AES Operations Public/Granted day:2023-12-21
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