Invention Grant
- Patent Title: Input/output semiconductor devices
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Application No.: US17554811Application Date: 2021-12-17
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Publication No.: US12034006B2Publication Date: 2024-07-09
- Inventor: Mao-Lin Huang , Lung-Kun Chu , Chung-Wei Hsu , Jia-Ni Yu , Kuo-Cheng Chiang
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
- Current Assignee Address: TW Hsinchu
- Agency: HAYNES AND BOONE, LLP
- The original application number of the division: US16583406 2019.09.26
- Main IPC: H01L27/092
- IPC: H01L27/092 ; H01L21/8238 ; H01L29/423 ; H01L29/49 ; H01L29/51 ; H01L29/786

Abstract:
A semiconductor device according to an embodiment includes a first gate-all-around (GAA) transistor and a second GAA transistor. The first GAA transistor includes a first plurality of channel members, a first interfacial layer over the first plurality of channel members, a first hafnium-containing dielectric layer over the first interfacial layer, and a metal gate electrode layer over the first hafnium-containing dielectric layer. The second GAA transistor includes a second plurality of channel members, a second interfacial layer over the second plurality of channel members, a second hafnium-containing dielectric layer over the second interfacial layer, and the metal gate electrode layer over the second hafnium-containing dielectric layer. A first thickness of the first interfacial layer is greater than a second thickness of the second interfacial layer. A third thickness of the first hafnium-containing dielectric layer is smaller than a fourth thickness of the second hafnium-containing dielectric layer.
Public/Granted literature
- US20220108984A1 Input/Output Semiconductor Devices Public/Granted day:2022-04-07
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