Invention Grant
- Patent Title: Semiconductor device with a capacitor and a plurality of overlapping openings in the conductive layers
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Application No.: US16830675Application Date: 2020-03-26
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Publication No.: US12027535B2Publication Date: 2024-07-02
- Inventor: Atsushi Umezaki
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP
- Agency: Husch Blackwell LLP
- Priority: JP 14150532 2014.07.24
- Main IPC: H01L27/12
- IPC: H01L27/12 ; H01L29/786 ; G06F3/041 ; G09G3/20 ; G11C19/28 ; G11C27/04 ; H01L21/8226 ; H01L27/02

Abstract:
The circuit includes a first transistor; a second transistor whose first terminal is connected to a gate of the first transistor for setting the potential of the gate of the first transistor to a level at which the first transistor is turned on; a third transistor for setting the potential of a gate of the second transistor to a level at which the second transistor is turned on and bringing the gate of the second transistor into a floating state; and a fourth transistor for setting the potential of the gate of the second transistor to a level at which the second transistor is turned off. With such a configuration, a potential difference between the gate and a source of the second transistor can be kept at a level higher than the threshold voltage of the second transistor, so that operation speed can be improved.
Public/Granted literature
- US20200243569A1 Semiconductor Device and Electronic Device Public/Granted day:2020-07-30
Information query
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