The present application discloses a method for manufacturing a SONOS memory, including: providing a substrate, wherein a first transistor gate of the SONOS memory and a first layer used for forming a second transistor gate are formed on the substrate; forming a patterned second layer on the upper surface of the first layer, wherein the second layer exposes the first layer corresponding to the outer side of the second transistor gate; performing first etching on the first layer exposed by the second layer; removing the second layer; and performing second etching on the first layer to form the second transistor gate. The present application also discloses a SONOS memory. The present application can form a vertical structure outside a selective transistor and a storage transistor, thus forming a vertical side wall in the subsequent process, so as to improve the performance of the device.