An integrated circuit, for example, a system-on-a-chip is disclosed. The integrated circuit includes a timing synchronisation unit including a hardware timer, for example, a gPTP timer. The integrated circuit also includes a non-Ethernet network interface, for example, a PCIe interface, for communicating with another integrated circuit having another hardware timer. The timing synchronisation unit is configured, in response to receiving a timing trigger from the other integrated circuit, to capture a local time t2. The timing synchronisation unit is further configured to provide the local time t2 to a processor for the processor to compute a timing offset between a remote time t1 of the other hardware timer which generated the timing trigger and the local time for time synchronisation.