Invention Grant
- Patent Title: Die over mold stacked semiconductor package
-
Application No.: US16392295Application Date: 2019-04-23
-
Publication No.: US11948917B2Publication Date: 2024-04-02
- Inventor: Florence Pon , Yi Xu , James Zhang , Yuhong Cai , Tyler Leuten , William Glennan , Hyoung Il Kim
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L25/065
- IPC: H01L25/065 ; H01L21/56 ; H01L23/00 ; H01L23/31 ; H01L25/00

Abstract:
Embodiments described herein provide a semiconductor package comprising multiple dies encapsulated in multiple molding compounds. In one example, a semiconductor package comprises: a first die or die stack on a substrate; a first molding compound encapsulating the first die or die stack on the substrate; a second die or die stack on the first molding compound; and a second molding compound encapsulating the second die or die stack and at least one portion of the first molding compound. In this example, the first die or die stack is electrically coupled to the substrate using a first wire bond and the second die or die stack is electrically coupled to the substrate using a second wire bond. Additionally, the first molding compound encapsulates the first wire bond and the second molding compound encapsulates the second wire bond. Furthermore, a footprint of the second die overlaps a footprint of the first die.
Public/Granted literature
- US20200343221A1 DIE OVER MOLD STACKED SEMICONDUCTOR PACKAGE Public/Granted day:2020-10-29
Information query
IPC分类: