Invention Grant
- Patent Title: Semiconductor structure and manufacturing method thereof
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Application No.: US17808404Application Date: 2022-06-23
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Publication No.: US11948616B2Publication Date: 2024-04-02
- Inventor: Xiaoguang Wang , Dinggui Zeng , Huihui Li , Jiefang Deng , Kanyu Cao
- Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC. , BEIJING SUPERSTRING ACADEMY OF MEMORY TECHNOLOGY
- Applicant Address: CN Hefei
- Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.,BEIJING SUPERSTRING ACADEMY OF MEMORY TECHNOLOGY
- Current Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.,BEIJING SUPERSTRING ACADEMY OF MEMORY TECHNOLOGY
- Current Assignee Address: CN Hefei; CN Beijing
- Agency: Cooper Legal Group, LLC
- Priority: CN 2111338280.3 2021.11.12
- Main IPC: G11C11/16
- IPC: G11C11/16 ; H10B61/00 ; H10N50/01 ; H10N50/10 ; H10N50/80

Abstract:
The present disclosure relates to a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a substrate; a transistor, including a control terminal, a first terminal, and a second terminal; a first magnetic memory structure, a bottom electrode of which is electrically connected to the first terminal of the transistor; a second magnetic memory structure, a top electrode of which is electrically connected to the first terminal of the transistor, the bottom electrode of the first magnetic memory structure is located in a same layer with a bottom electrode of the second magnetic memory structure; a first bit line, electrically connected to a top electrode of the first magnetic memory structure; a second bit line, electrically connected to the bottom electrode of the second magnetic memory structure; and a selection line, electrically connected to a second terminal of the transistor.
Public/Granted literature
- US20230154515A1 SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Public/Granted day:2023-05-18
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