Invention Grant
- Patent Title: Maximum voltage detection in a power management circuit
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Application No.: US17406550Application Date: 2021-08-19
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Publication No.: US11929713B2Publication Date: 2024-03-12
- Inventor: Marcus Granger-Jones
- Applicant: Qorvo US, Inc.
- Applicant Address: US NC Greensboro
- Assignee: Qorvo US, Inc.
- Current Assignee: Qorvo US, Inc.
- Current Assignee Address: US NC Greensboro
- Agency: Withrow & Terranova, P.L.L.C.
- Main IPC: H03F1/02
- IPC: H03F1/02 ; G01R19/04 ; H03F3/195 ; H03F3/20 ; H03F3/24 ; H03K5/13

Abstract:
Maximum voltage detection in a power management circuit is provided. In embodiments disclosed herein, the power management circuit includes a voltage processing circuit configured to receive a first time-variant target voltage having a first group delay relative to a time-variant target voltage and a second time-variant target voltage having a second group delay relative to the time-variant target voltage. The voltage processing circuit includes a maximum signal detector circuit configured to generate a windowed time-variant target voltage that is higher than or equal to a highest one of the first time-variant target voltage and the second time-variant target voltage in a group delay tolerance window(s) defined by the first group delay and the second group delay. In this regard, the windowed time-variant target voltage can tolerate a certain amount of group delay within the group delay tolerance window(s).
Public/Granted literature
- US20220115987A1 MAXIMUM VOLTAGE DETECTION IN A POWER MANAGEMENT CIRCUIT Public/Granted day:2022-04-14
Information query
IPC分类: