Disclosed are an array substrate, a display panel and a display apparatus. The array substrate includes: gate lines, data lines, and pixel units. The gate lines and the data lines are arranged between at least part of the adjacent pixel units. The array substrate further includes: common electrode lead wires and common electrode layers. The common electrode lead wires are arranged on a same layer as the data lines, extend in a same direction as the data lines, and are located between at least part of the adjacent pixel units. The common electrode layers are insulated from the common electrode lead wires through insulating layers and are connected with the common electrode lead wires through via holes in the insulating layers. The via holes are located in a region where the gate lines and the common electrode lead wires intersect.