Invention Grant
- Patent Title: Integrated circuit and manufacturing method thereof
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Application No.: US17873935Application Date: 2022-07-26
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Publication No.: US11929361B2Publication Date: 2024-03-12
- Inventor: Xin-Yong Wang , Li-Chun Tien , Chih-Liang Chen
- Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. , TSMC China Company Limited
- Applicant Address: TW Hsinchu
- Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.,TSMC CHINA COMPANY LIMITED
- Current Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.,TSMC CHINA COMPANY LIMITED
- Current Assignee Address: TW Hsinchu; CN Shanghai
- Agency: Birch, Stewart, Kolasch & Birch, LLP
- Priority: CN 2011271727.5 2020.11.13
- The original application number of the division: US17108635 2020.12.01
- Main IPC: H01L27/02
- IPC: H01L27/02 ; H01L21/768 ; H01L23/522

Abstract:
An integrated circuit includes a first transistor, a second transistor, a first power line, and a second power line. The first transistor has a first active region and a first gate structure, in which the first active region has a source region and a drain region on opposite sides of the first gate structure. The second transistor is below the first transistor, and has a second active region and a second gate structure, in which the second active region has a source region and a drain region on opposite sides of the second gate structure. The first power line is above the first transistor, in which the first power line is electrically connected to the source region of first active region. The second power line is below the second transistor, in which the second power line is electrically connected to the source region of second active region.
Public/Granted literature
- US20220359493A1 INTEGRATED CIRCUIT AND MANUFACTURING METHOD THEREOF Public/Granted day:2022-11-10
Information query
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