Invention Grant
- Patent Title: Semiconductor structure for wafer level bonding and bonded semiconductor structure
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Application No.: US17382325Application Date: 2021-07-21
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Publication No.: US11929335B2Publication Date: 2024-03-12
- Inventor: Chien-Ming Lai
- Applicant: UNITED MICROELECTRONICS CORP.
- Applicant Address: TW Hsin-Chu
- Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee: UNITED MICROELECTRONICS CORP.
- Current Assignee Address: TW Hsin-Chu
- Agent Winston Hsu
- Priority: CN 2110652095.5 2021.06.11
- Main IPC: H01L23/00
- IPC: H01L23/00

Abstract:
A semiconductor structure for wafer level bonding includes a bonding dielectric layer disposed on a substrate and a bonding pad disposed in the bonding dielectric layer. The bonding pad includes a top surface exposed from the bonding dielectric layer, a bottom surface opposite to the top surface, and a sidewall between the top surface and the bottom surface. A bottom angle between the bottom surface and sidewall of the bonding pad is smaller than 90 degrees.
Public/Granted literature
- US20220399295A1 SEMICONDUCTOR STRUCTURE FOR WAFER LEVEL BONDING AND BONDED SEMICONDUCTOR STRUCTURE Public/Granted day:2022-12-15
Information query
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