Invention Grant
- Patent Title: Testing method, testing system, and testing apparatus for semiconductor chip
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Application No.: US17595609Application Date: 2021-06-16
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Publication No.: US11929132B2Publication Date: 2024-03-12
- Inventor: Cheng-Jer Yang
- Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
- Applicant Address: CN Hefei
- Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
- Current Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
- Current Assignee Address: CN Hefei
- Agency: Cooper Legal Group, LLC
- Priority: CN 2010667480.2 2020.07.13
- International Application: PCT/CN2021/100358 2021.06.16
- International Announcement: WO2022/012255A 2022.01.20
- Date entered country: 2021-11-19
- Main IPC: G11C29/12
- IPC: G11C29/12

Abstract:
The present invention relates to a testing method, a testing system, and a testing apparatus for a semiconductor chip. The method includes: acquiring a target chip; obtaining an abnormal chip after a test of read and write functions is performed separately on a preset number of memory cells in an edge region of the target chip; recording location information of individual memory cells with abnormal read and write functions on the abnormal chip; judging whether an abnormality of read and write functions of the abnormal chip is a block abnormality based on the location information; wherein the abnormal chip refers to the target chip including the memory cell with abnormal read and write functions.
Public/Granted literature
- US20220399068A1 TESTING METHOD, TESTING SYSTEM, AND TESTING APPARATUS FOR SEMICONDUCTOR CHIP Public/Granted day:2022-12-15
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