Invention Grant
- Patent Title: Posit tensor processing
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Application No.: US17567638Application Date: 2022-01-03
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Publication No.: US11928442B2Publication Date: 2024-03-12
- Inventor: Vijay S. Ramesh
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Brooks, Cameron & Huebsch, PLLC
- Main IPC: G06F7/544
- IPC: G06F7/544 ; G06F17/16

Abstract:
A method related to posit tensor processing can include receiving, by a plurality of multiply-accumulator (MAC) units coupled to one another, a plurality of universal number (unum) or posit bit strings organized in a matrix and to be used as operands in a plurality of respective recursive operations performed using the plurality of MAC units and performing, using the MAC units, the plurality of respective recursive operations. Iterations of the respective recursive operations are performed using at least one bit string that is a same bit string as was used in a preceding iteration of the respective recursive operations. The method can further include prior to receiving the plurality of unum or posit bit strings, performing an operation to organize the plurality of unum or posit bit strings to achieve a threshold bandwidth ratio, a threshold latency, or both during performance of the plurality of respective recursive operations.
Public/Granted literature
- US20220121420A1 POSIT TENSOR PROCESSING Public/Granted day:2022-04-21
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