Invention Grant
- Patent Title: Rough buffer layer for group III-V devices on silicon
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Application No.: US17867877Application Date: 2022-07-19
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Publication No.: US11862720B2Publication Date: 2024-01-02
- Inventor: Kuei-Ming Chen , Chi-Ming Chen , Chung-Yi Yu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Eschweiler & Potashnik, LLC
- The original application number of the division: US16806108 2020.03.02
- Main IPC: H01L29/778
- IPC: H01L29/778 ; H01L21/02 ; H01L29/66

Abstract:
Various embodiments of the present application are directed towards a group III-V device including a rough buffer layer. The rough buffer layer overlies a silicon substrate, a buffer structure overlies the rough buffer layer, and a heterojunction structure overlies the buffer structure. The buffer structure causes band bending and formation of a two-dimensional hole gas (2DHG) in the rough buffer layer. The rough buffer layer includes silicon or some other suitable semiconductor material and, in some embodiments, is doped. A top surface of the rough buffer layer and/or a bottom surface of the rough buffer layer is/are rough to promote carrier scattering along the top and bottom surfaces. The carrier scattering reduces carrier mobility and increases resistance at the 2DHG. The increased resistance increases an overall resistance of the silicon substrate, which reduces substrate loses and increases a power added efficiency (PAE).
Public/Granted literature
- US20220367699A1 ROUGH BUFFER LAYER FOR GROUP III-V DEVICES ON SILICON Public/Granted day:2022-11-17
Information query
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