Invention Grant
- Patent Title: Methods for polishing dielectric layer in forming semiconductor device
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Application No.: US17893955Application Date: 2022-08-23
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Publication No.: US11862472B2Publication Date: 2024-01-02
- Inventor: Xiaohong Zhou
- Applicant: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
- Applicant Address: CN Wuhan
- Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
- Current Assignee: YANGTZE MEMORY TECHNOLOGIES CO., LTD.
- Current Assignee Address: CN Wuhan
- Agency: BAYES PLLC
- Main IPC: H01L21/3105
- IPC: H01L21/3105 ; B24B1/00 ; B24B37/04 ; C09G1/00 ; C09G1/02 ; C09G1/04 ; C09G1/06 ; C09K3/14 ; C09K13/06 ; H01L21/306 ; H01L21/321

Abstract:
Methods for polishing dielectric layers using an auto-stop slurry in forming semiconductor devices, such as three-dimensional (3D) memory devices, are provided. The methods include forming a stack structure in a staircase region and a core array region, the stack structure including a staircase structure in the staircase region; forming a dielectric layer over the staircase region and a peripheral region outside the stack structure; and polishing the dielectric layer using an auto-stop slurry containing a ceria-based abrasive.
Public/Granted literature
- US20220406612A1 METHODS FOR POLISHING DIELECTRIC LAYER IN FORMING SEMICONDUCTOR DEVICE Public/Granted day:2022-12-22
Information query
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