Invention Grant
- Patent Title: Stacked semiconductor device
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Application No.: US17508861Application Date: 2021-10-22
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Publication No.: US11862235B2Publication Date: 2024-01-02
- Inventor: Frederick A. Ware
- Applicant: Rambus Inc.
- Applicant Address: US CA San Jose
- Assignee: Rambus Inc.
- Current Assignee: Rambus Inc.
- Current Assignee Address: US CA San Jose
- Agency: Peninsula Patent Group
- Agent Lance Kreisman
- Main IPC: G11C11/40
- IPC: G11C11/40 ; G11C11/4093 ; H01L25/065 ; G11C5/04 ; G11C11/4096 ; G11C17/16 ; G11C17/18 ; H01L25/18 ; H01L23/00

Abstract:
A stacked semiconductor device is disclosed that includes a plurality of semiconductor dies. Each die has oppositely disposed first and second surfaces, with pads formed on each of the surfaces. A plurality of through-vias connect respective pads on the first surface to respective pads on the second surface. The through-vias include a first group of through-vias coupled to respective I/O circuitry on the semiconductor die and a second group of through-vias not coupled to I/O circuitry on the semiconductor die. The plurality of semiconductor dies are stacked such that the first group of through-vias in a first one of the plurality of semiconductor dies are aligned with respective ones of at least a portion of the second group of through-vias in a second one of the plurality of semiconductor dies.
Public/Granted literature
- US20220139445A1 STACKED SEMICONDUCTOR DEVICE Public/Granted day:2022-05-05
Information query