Invention Grant
- Patent Title: Semiconductor device and decoding methods
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Application No.: US17319832Application Date: 2021-05-13
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Publication No.: US11750210B2Publication Date: 2023-09-05
- Inventor: Koichi Ishimi , Akio Fujii
- Applicant: RENESAS ELECTRONICS CORPORATION
- Applicant Address: JP Tokyo
- Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee: RENESAS ELECTRONICS CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: McDermott Will & Emery LLP
- Priority: JP 2020096553 2020.06.03
- Main IPC: H03M5/12
- IPC: H03M5/12 ; H04L1/00 ; H04L7/00 ; H04L25/49 ; H02M1/00

Abstract:
The present invention is to reduce detection of an erroneous edge caused by variation in a case of a sampling frequency that is not larger than a data transmission frequency. A semiconductor device includes: a data reception circuit configured to receive first data at first time and receive second data at second time; and an edge recognition circuit configured to set a range and detect an edge contained in the range. The edge recognition circuit includes a measurement circuit configured to measure a first period taken from the reception of the first data to the reception of the second data, and is configured to determine the range in which the edge contained in the data that is received by the data reception circuit is detected, on the basis of the first period.
Public/Granted literature
- US20210384917A1 SEMICONDUCTOR DEVICE AND DECODING METHODS Public/Granted day:2021-12-09
Information query
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