Invention Grant
- Patent Title: Method for using semiconductor intelligence line
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Application No.: US17539621Application Date: 2021-12-01
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Publication No.: US11749980B2Publication Date: 2023-09-05
- Inventor: Chao-Cheng Lu
- Applicant: Chao-Cheng Lu
- Applicant Address: TW Taipei
- Assignee: Chao-Cheng Lu
- Current Assignee: Chao-Cheng Lu
- Current Assignee Address: TW Taipei
- Agency: MUNCY, GEISSLER, OLDS & LOWE, P.C.
- Priority: TW 0106442 2021.02.24
- Main IPC: H02H3/087
- IPC: H02H3/087 ; H02H9/02 ; H02M1/32

Abstract:
The method for using semiconductor intelligence line of the invention, which is to set the semiconductor intelligence line on the drain source voltage axis of the first semiconductor output characteristic, has a gate voltage setting, which indicates the function of limiting the application limit of the drain source current on the output characteristic.
Public/Granted literature
- US20220271525A1 METHOD FOR USING SEMICONDUCTOR INTELLIGENCE LINE Public/Granted day:2022-08-25
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